Advantech PCL-818 Series Instrukcja Użytkownika Pobierz pdf (Strona 31)

23 Chapter 3

Base Address Selection (SW1)

You control the PCL-818HD/HG/L's operation by reading or writing data

to the PC's I/O (input/output) port addresses. The PCL-818HD/HG/L

requires 32 consecutive address locations with the FIFO buffer enabled or

16 locations with the FIFO disabled.

Switch SW1 sets the card's base (beginning) address. Valid base

addresses range from Hex 000 to Hex 3F0. Other devices in your system

may, however, be using some of these addresses.

We set the PCL-818HD/HG/L for a base address of Hex 300 at the fac-

tory. If you need to adjust it to some other address range, set switch SW1

as shown in the following table:

Switch 1 2 3 4 5 6

Line A9 A8 A7 A6 A5 A4

Note: Switches 1-6 control the PC bus address lines as

follows:

1 2 ... 26 27 28 29 30 31 32 33 34 35 36 ... 73 74

PCL-818 Series 1
User Manual 1
PCL-818 Series User Manual ii 2
PCL-818 Series User Manual iv 4
PCL-818 Series User Manual vi 6
Contents 7
Overview 9
Chapter 1 Overview 10
1.2 Features 11
1.3 Applications 12
1.4 Installation Guide 13
PCL-818 Series User Manual 6 14
1.5 Software Overview 15
1.6 Device Driver Roadmap 16
9 Chapter 1 17
1.7 Accessories 18
Installation 19
Chapter 2 Installation 20
2.2 Driver Installation 21
PCL-818 Series User Manual 14 22
2.3 Hardware Installation 23
PCL-818 Series User Manual 16 24
17 Chapter 2 25
Figure 2.5: Device Name 26
Figure 2.6: Test Utility 27
PCL-818 Series User Manual 20 28
Signal Connections 29
Chapter 3 Signal Connections 30
23 Chapter 3 31
PCL-818 Series User Manual 24 32
Switches Function Description 32
Jumpers Function Description 32
25 Chapter 3 33
JP11 External 33
Internal (default) 33
PCL-818 Series User Manual 28 36
Table 3-8: Jumper Settings 37
3.3 Signal Connections 38
31 Chapter 3 39
PCL-818 Series User Manual 32 40
33 Chapter 3 41
PCL-818 Series User Manual 34 42
35 Chapter 3 43
PCL-818 Series User Manual 36 44
Specifications 45
Appendix A Specifications 46
A.2 Analog Output 47
A.3 Digital Input /Output 47
A.4 Counter/Timer 48
A.5 General 48
Block Diagram 49
Appendix B Block Diagram 50
Register Structure & 51
C.1 Overview 52
C.2 I/O Port Address Map 52
Range codes appear below: 57
51 Appendix C 59
Bit # 7 6 5 4 3 2 1 0 59
C.9 D/A Output — BASE+04/05H 61
PCL-818 Series User Manual 54 62
Write FIFO interrupt control 62
Bit # 7 6543 2 1 0 62
BASE + 06H X X X X X X X FINT 62
C.12 A/D Status — BASE+08H 63
PCL-818 Series User Manual 56 64
C.13 A/D Control — BASE+09H 65
PCL-818 Series User Manual 58 66
Trigger Source ST1 ST0 66
Software trigger 0 X 66
External trigger 1 0 66
Pacer trigger 1 1 66
59 Appendix C 67
Write Timer/Counter enable 67
Bit # 7654321 0 67
BASE + 0AH TC1 TC0 67
C.18 FIFO Status — BASE+19H 69
C.19 FIFO Clear — BASE+19H 70
Calibration 71
Appendix D Calibration 72
D.1 VR Assignment 73
D.2 A/D Calibration 74
D.3 D/A Calibration 74

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