Advantech PCI-1710HG Dokumentacja Strona 151

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(N+1)/2 counts and low for (N-1)/2 counts.
MODE 4 Software-Triggered Strobe
After the mo de is set, the output will be high. When the count is
loaded, the counter will begin counting. On terminal count, the output
will go low for one input clock period then go high again. If you
reload the count register during counting, the new count will be loaded
on the next CLK pulse. The count will be inhibited while the GATE
input is low.
MODE 5 Hardware-Triggered Strobe
The counter will start counting after the rising edge of the trigger input
and will go low for one clock period when the terminal count is
reached. The counter is re-triggerable.
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