Advantech PCI-1753E Instrukcja Użytkownika Pobierz pdf (Strona 36)

PCI-1753/1753E User’s Manual 30

Appendix A Register Format of

PCI-1753/1753E

A.1 PCI-1753 Register Format

Base

Address

(Decimal)

Function

Read Write

0 Port A0 Port A0

1 Port B0 Port B0

2 Port C0 Port C0

3 - Port 0 Configuration Register

4 Port A1 Port A1

5 Port B1 Port B1

6 Port C1 Port C1

7 - Port 1 Configuration Register

8 Port A2 Port A2

9 Port B2 Port B2

10 Port C2 Port C2

11 - Port 2 Configuration Register

12 Port A3 Port A3

13 Port B3 Port B3

14 Port C3 Port C3

15 - Port 3 Configuration Register

16 Interrupt Control Register for Port 0 Interrupt Control Register for Port 0

17 Interrupt Control Register for Port 1 Interrupt Control Register for Port 1

18 Interrupt Control Register for Port 2 Interrupt Control Register for Port 2

19 Interrupt Control Register for Port 3 Interrupt Control Register for Port 3

20 - Pattern Match Value Register for

Port A0

24 - Pattern Match Enable Register for

Port A0

28 - Change of State Enable Register

for Port B0

1 2 ... 31 32 33 34 35 36 37 38 39 40 41 42

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